Multi-Bit Operations

Part of Basic Computing

Multi-bit operations process entire groups of bits simultaneously — enabling arithmetic on integers of any width, bitfield manipulation, and efficient data transformation in computing hardware.

Why This Matters

Single-bit logic gates are the foundation, but all practical computing operates on multi-bit quantities: 8-bit bytes, 16-bit words, 32-bit integers. Understanding how single-bit operations scale to multi-bit operations bridges the gap between gate-level circuits and the arithmetic processors use.

Multi-bit operations also introduce important engineering decisions: how wide should the data path be? How is overflow handled? How do we efficiently test or modify specific bits within a word? These decisions pervade hardware design and software programming from embedded systems to server CPUs.

Mastery of multi-bit operations enables writing efficient low-level code, designing ALU circuits, understanding compiler output, and implementing data protocols where specific bit positions carry specific meanings.

Parallel Logic Operations

Applying Boolean logic to multi-bit operands is straightforward: perform the operation independently and simultaneously on each corresponding pair of bits.

8-bit AND: A[7:0] AND B[7:0] produces result[7:0] where result[i] = A[i] AND B[i]

Example: 0b10110101 AND 0b11001100

  1 0 1 1 0 1 0 1   (A = 0xB5)
  1 1 0 0 1 1 0 0   (B = 0xCC)
  ─ ─ ─ ─ ─ ─ ─ ─
  1 0 0 0 0 1 0 0   (result = 0x84)

Hardware: eight 2-input AND gates, each connecting corresponding bits. The 74HC08 (quad AND) provides 4 AND gates; two 74HC08s provide 8. Similarly, 74HC32 (OR) and 74HC86 (XOR) provide parallel logic for all 8 bits with 2 chips each.

Masking: AND with a mask extracts specific bit fields. To extract bits 3:0 (low nibble): AND with 0x0F (0b00001111). To test if bit 5 is set: AND with 0x20; result is nonzero if the bit is set.

Bit setting: OR with a mask sets specific bits. To set bit 7: OR with 0x80. Other bits are unaffected.

Bit clearing: AND with the complement of a mask clears specific bits. To clear bits 5:4: AND with NOT(0x30) = AND with 0xCF.

Bit toggling: XOR with a mask toggles specific bits. XOR a byte with 0xFF inverts all bits (equivalent to NOT); XOR with 0x01 toggles the LSB.

Multi-Bit Shift Operations

Shift operations move all bits left or right by a specified number of positions, filling vacated positions with 0 (or the sign bit for arithmetic right shift).

Logical shift left (LSL) by n positions: equivalent to multiply by 2^n. Bits shifted out of the MSB are lost (carry flag captures the last shifted-out bit). Vacated LSB positions fill with 0.

0xA3 LSL 1: 0b10100011 → 0b01000110 = 0x46 (with carry = 1, since MSB was 1)

Logical shift right (LSR) by n: equivalent to divide by 2^n (unsigned). MSB positions fill with 0. LSB is shifted into carry.

Arithmetic shift right (ASR): MSB is preserved (sign extension). Used for signed integer division by 2. If MSB was 1 (negative number), it remains 1 after shift, keeping the result negative.

0b10110000 ASR 1: 0b11011000 (MSB preserved, result is negative/2)

Hardware shift: for a 1-bit shift, wire bit[i] to bit[i-1] for left shift (bit 0 to carry-in). For N-bit shift, chain N such connections. Shift-by-variable amounts require a barrel shifter (multiplexer network), which is more complex but shifts by any amount in one clock cycle.

Arithmetic Overflow and Saturation

When a multi-bit arithmetic result is too large to represent in the available bit width, overflow occurs:

Unsigned 8-bit addition: 200 + 100 = 300, but 300 > 255 (max 8-bit value). Stored result: 300 - 256 = 44 (wrong). Carry flag is set.

Signed 8-bit addition: 100 + 100 = 200, but max signed 8-bit is 127. Stored as -56 (two’s complement wraps). Overflow flag is set.

Detecting overflow in software: after addition, check the carry flag (unsigned overflow) or overflow flag (signed overflow) and handle accordingly.

Multi-precision arithmetic: to add numbers wider than the register, add low words first (carry-free), then add high words including the carry from the low addition. For 16-bit addition on an 8-bit processor:

CLC              ; clear carry before first add
ADD  A_low, B_low  ; add low bytes, sets carry if overflows
ADC  A_high, B_high ; add high bytes plus carry from low add

This extends to arbitrary precision: 32-bit, 64-bit, or 1024-bit addition on an 8-bit processor using a chain of ADD/ADC instructions.

Saturation arithmetic: instead of wrapping on overflow, clamp the result to the maximum or minimum representable value. Useful for audio and image processing where wraparound is more harmful than clipping. Requires checking overflow flags and substituting max/min values.

Bit Rotation

Rotation is a shift where bits shifted out one end reappear at the other:

Rotate left (ROL): bit shifted out of MSB enters LSB (or enters through carry flag in rotate-through-carry variant).

0b10110100 ROL 1: 0b01101001 (MSB=1 wraps to LSB)

Rotate right (ROR): opposite direction.

Rotation through carry (RCL/RCR): the carry flag is treated as an extra bit in the rotation. Useful for multi-precision shifts (carry passes between successive shift operations on adjacent words).

Practical use: rotating through carry shifts a multi-byte value one bit at a time, passing the carry between bytes. To shift a 24-bit value right by 1 using 8-bit registers:

LSR byte2      ; shift high byte right, LSB goes to carry
ROR byte1      ; shift middle byte right through carry
ROR byte0      ; shift low byte right through carry

This technique extends to arbitrary width values.