Arithmetic Logic Unit
Part of Basic Computing
The ALU is the computational heart of every processor, performing all arithmetic and logical operations on data.
Why This Matters
Every calculation a computer performs — adding numbers, comparing values, shifting bits — flows through the Arithmetic Logic Unit. Understanding how an ALU works demystifies the processor and shows that even complex computation reduces to a handful of repeated simple operations implemented in transistor circuits.
Building even a minimal ALU from discrete logic gates is one of the most satisfying exercises in digital electronics. It proves that thinking machines are not magic but engineering: carefully arranged switches that manipulate binary numbers according to strict rules. A functional 4-bit ALU can be constructed from components salvageable from surplus electronics or built from scratch using discrete transistors.
In a civilization-rebuilding context, a working ALU on a breadboard demonstrates the principle that underlies all future computing infrastructure. Once the principle is understood, scaling up is a matter of resources and patience rather than conceptual leaps.
Core Functions of an ALU
An ALU performs two classes of operations: arithmetic (addition, subtraction, increment, decrement) and logic (AND, OR, XOR, NOT, shift). A control signal — typically a 3- or 4-bit opcode — selects which operation to apply to the inputs.
The minimal useful ALU accepts two N-bit operands (A and B) and an operation selector, then produces an N-bit result plus status flags. The most important flags are:
- Zero (Z): result is all zeros
- Carry (C): addition produced a carry out of the most significant bit
- Overflow (V): signed arithmetic overflowed
- Negative (N): most significant bit of result is 1
These four flags are checked by conditional branch instructions, allowing the CPU to make decisions based on computation results.
A 4-bit ALU is the natural starting point. It handles numbers 0–15 (unsigned) or −8 to +7 (two’s complement signed). Four bits means four full-adder stages and four parallel logic gate banks — manageable with a few dozen gates.
Building the Adder Core
Addition is the foundation. Start with a single-bit full adder: it accepts two input bits (A, B) and a carry-in (Cin), producing a sum bit and a carry-out (Cout).
Sum = A XOR B XOR Cin Cout = (A AND B) OR (Cin AND (A XOR B))
Each full adder requires five basic gates. For a 4-bit ripple-carry adder, cascade four full adders: the Cout of stage 0 feeds the Cin of stage 1, and so on. The final Cout is the carry flag.
Subtraction reuses the adder. Two’s complement subtraction A − B equals A + (NOT B) + 1. Invert all B bits (using XOR gates with a control signal that doubles as “subtract mode”) and force Cin of the first stage to 1. With one control line, the adder becomes an adder-subtractor.
To build a full adder from NAND gates only (useful when NAND is your only available gate type):
- G1 = NAND(A, B)
- G2 = NAND(A, G1)
- G3 = NAND(B, G1)
- G4 = NAND(G2, G3) → this is A XOR B
- G5 = NAND(G4, Cin)
- G6 = NAND(G4, G5)
- G7 = NAND(Cin, G5)
- Sum = NAND(G6, G7)
- Cout = NAND(G1, G5)
Nine NAND gates per bit. A 4-bit adder needs 36 NAND gates total.
Logic Unit Construction
The logic unit runs in parallel with the adder, computing all possible logic results simultaneously and using a multiplexer to select the desired one.
For each bit position, compute:
- AND of A_i and B_i
- OR of A_i and B_i
- XOR of A_i and B_i
- NOT of A_i (B is ignored)
A 4-to-1 multiplexer (2-bit selector) picks which result passes to the output. This requires 4 AND gates (gating each result with its selection condition) and a 4-input OR gate to combine them.
The operation select lines (S1, S0) encode: 00=AND, 01=OR, 10=XOR, 11=NOT.
For a 4-bit logic unit, replicate this circuit four times — one per bit position — all sharing the same S1, S0 control lines.
Combining ALU and Logic Unit
The complete ALU adds a top-level multiplexer to choose between arithmetic result and logic result. A single “mode” control bit (M) selects: M=0 means arithmetic (adder output), M=1 means logic (logic unit output).
Full operation encoding with 3 control bits (M, S1, S0):
- 000: ADD
- 001: OR
- 010: XOR
- 011: NOT A
- 100: SUBTRACT
- 101: AND
- 110: Pass A (useful for move/load operations)
- 111: Pass B
Status flag generation:
- Zero flag: NOR all output bits together (result is zero when all bits are 0)
- Carry flag: Cout from the final adder stage
- Negative flag: MSB of the result
- Overflow flag: XOR of the carry into and carry out of the MSB stage
Practical Construction Notes
On a breadboard, use 74-series TTL ICs for rapid construction. The 74181 is a complete 4-bit ALU in a single chip — a remarkable piece of 1970s integration. For learning purposes, building from individual 7400 (NAND), 7486 (XOR), and 7408 (AND) chips is more instructive.
Power supply must be stable 5V with adequate decoupling capacitors (100nF ceramic per IC, plus 10µF electrolytic per power rail section). TTL draws significant current; a 4-bit ALU from discrete gates may draw 200–500mA.
Test each stage before combining: verify the adder with all 64 input combinations (A: 0–15, B: 0–3 for initial testing), then verify the logic unit, then the combined ALU.
For a permanent installation, transfer the verified design to wire-wrap board or a custom PCB. Document each connection meticulously — troubleshooting a miswired ALU with 200+ connections is extremely tedious without good records.
The ALU is a complete, testable computational unit. Connect it to a register file and a control unit and you have the core of a working processor.