Truth Tables
Part of Boolean Logic and Gates
The systematic tabulation of every input combination and its corresponding output — the universal tool for specifying, verifying, and analyzing Boolean functions.
Why This Matters
A truth table is the definitive specification of any combinational logic circuit. It exhaustively lists every possible input combination and the corresponding output for each. Given a truth table, you can determine the Boolean expression, design the gate circuit, and verify that an existing circuit matches the intended behavior.
Truth tables are the common language between logic design and circuit implementation. When you specify a circuit’s behavior as a truth table, you can then derive the optimal gate circuit through Boolean algebra or Karnaugh maps. When you test a physical circuit, comparing measured outputs against the truth table is how you verify it works.
Every logic gate can be fully described by its truth table. Knowing how to read, write, and use truth tables is the fundamental skill underlying all digital design.
Structure of a Truth Table
A truth table has one column for each input, plus one column for each output. Each row represents one specific combination of input values.
For N binary inputs, there are exactly 2^N rows — one for each possible input combination. A truth table for 3 inputs has 2^3 = 8 rows. For 4 inputs, 16 rows. For 8 inputs, 256 rows (still manageable). For 16 inputs, 65,536 rows (impractical — use algebraic methods).
Standard column ordering: inputs are listed with the MSB (most significant bit) on the left. The rows are ordered in standard binary counting order: 000, 001, 010, 011, 100, 101, 110, 111 for 3 inputs. This ensures all combinations are covered without duplicates or omissions.
Filling in a Truth Table
For each row, evaluate the logic function at those specific input values.
Example: truth table for F = (A AND B) OR (NOT-A AND C)
| A | B | C | F |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 0 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 1 |
For row A=0, B=1, C=0:
- A AND B = 0 AND 1 = 0
- NOT-A = 1; NOT-A AND C = 1 AND 0 = 0
- F = 0 OR 0 = 0 ✓ (matches the table)
When evaluating by hand, compute each sub-expression separately and combine. For complex expressions, add intermediate columns for sub-expressions to track the calculation.
Multiple Outputs
A circuit with multiple outputs has multiple output columns, one per output. Each output is evaluated independently for each input row.
Example: a 2-bit adder (A + B → Sum, Carry):
| A | B | Sum | Carry |
|---|---|---|---|
| 0 | 0 | 0 | 0 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 0 | 1 |
Each output column is independent. Sum = A XOR B. Carry = A AND B. These are treated as two separate Boolean functions that happen to share the same inputs.
From Truth Table to Boolean Expression
The truth table directly gives you the Boolean expression through the sum-of-minterms (SOP — sum of products) method.
Step 1: Identify all rows where the output is 1. Step 2: For each such row, write a minterm — an AND term containing each input: the input itself if it is 1 in that row, the inverted input if it is 0. Step 3: OR all the minterms together.
For the example F table above, rows where F=1: (A=0,B=0,C=1), (A=0,B=1,C=1), (A=1,B=1,C=0), (A=1,B=1,C=1).
Minterms:
- (NOT-A)(NOT-B)(C) = row 001
- (NOT-A)(B)(C) = row 011
- (A)(B)(NOT-C) = row 110
- (A)(B)(C) = row 111
SOP: F = NOT-A·NOT-B·C + NOT-A·B·C + A·B·NOT-C + A·B·C
This can be simplified: the last two terms share A·B, so: A·B·NOT-C + A·B·C = A·B·(NOT-C + C) = A·B. The first two share NOT-A·C: NOT-A·NOT-B·C + NOT-A·B·C = NOT-A·C·(NOT-B + B) = NOT-A·C. Final simplified: F = A·B + NOT-A·C. This matches the original expression. ✓
Using Don’t-Care Conditions
Some input combinations may never occur (invalid inputs to a BCD decoder for values above 9, for example). These are don’t-care conditions, marked with an X in the truth table.
Don’t-cares can be treated as either 0 or 1 during simplification — whichever produces a simpler expression. In a Karnaugh map, don’t-care cells can be included or excluded from groups depending on which choice minimizes the expression.
Don’t-cares reduce the final gate count at the cost of undefined (potentially incorrect) behavior for the forbidden input combinations. This is acceptable if those combinations are genuinely impossible.
Verifying a Physical Circuit
Once a circuit is built, verify it against its truth table:
- Connect input switches to all input lines.
- Connect output LEDs (or a voltmeter, or oscilloscope) to all outputs.
- Set inputs to each row in the truth table in order.
- For each row, check that all output values match the expected values.
For N inputs, you test 2^N input combinations. For a 4-input circuit, that is 16 tests — manageable manually. For a 6-input circuit (64 combinations), consider automated testing with a binary counter driving the inputs.
Document discrepancies: if row (A=1,B=0,C=1) gives wrong output, that isolates the fault to circuits that affect that minterm. Trace through the gate path for that input combination to find the faulty gate or connection.