Switching Speed

Part of The Transistor

Switching speed determines how fast a transistor can toggle between on and off states — a critical parameter for digital logic, pulse circuits, and high-frequency applications.

Why This Matters

A transistor that switches perfectly at 1 kHz may produce garbled output at 1 MHz and do nothing at 10 MHz. Every digital system depends on transistors switching reliably within a specific time window. If your transistor is too slow, logic levels become undefined, stored data corrupts, and communications collapse.

Understanding what limits switching speed lets you select appropriate transistors for a given application, design circuits that stay within speed limits, and apply techniques that push speed higher when needed. This knowledge spans from the mundane (can this audio amplifier switch fast enough for the feedback loop?) to the critical (can this clock circuit generate clean pulses for a 1 MHz processor?).

The two practical concerns are: how to choose transistors fast enough for your application, and how to design circuits that extract maximum speed from available transistors.

What Limits Switching Speed

Junction Capacitances

Every PN junction is a capacitor. The base-emitter capacitance C_BE and base-collector capacitance C_CB must charge and discharge with each switching event. Charging capacitance through a resistance takes time (RC time constant). These capacitances cannot be made zero — they are determined by the physical junction area and doping levels.

Typical values:

• C_BE: 5–100 pF (higher for power transistors, lower for RF types)
• C_CB: 1–20 pF

The base-collector capacitance has a disproportionate effect on switching speed because of the Miller effect: in an amplifier or switching circuit, C_CB is effectively multiplied by the voltage gain, making it appear much larger than its actual value.

Minority Carrier Storage Time

The slowest part of transistor switching is turn-off from saturation. When a transistor is saturated (both junctions forward biased), excess minority carriers are stored throughout the base and collector regions. When base drive is removed, these carriers must recombine before the transistor can turn off.

Turn-off consists of three phases:

1. Storage time (t_s): Base drive removed; transistor stays saturated while stored charge dissipates. This is the dominant delay in saturated switches. Typical: 50–1,000 ns.

2. Fall time (t_f): Collector current decreases from 90% to 10% of its on-state value. Determined by junction capacitances charging. Typical: 5–50 ns.

3. Turn-on delay (t_d) and rise time (t_r): At turn-on, current rises from 10% to 90% of final value. Also determined by capacitances and minority carrier injection. Typical combined: 10–100 ns.

Transistor Type	Storage Time	Rise Time	Fall Time	Max Toggle Frequency
2N3904 (general)	200 ns	35 ns	50 ns	~1 MHz
2N2222 (medium speed)	225 ns	25 ns	60 ns	~1 MHz
2N2369 (fast switch)	12 ns	12 ns	15 ns	~10 MHz
BFR90 (RF)	1–5 ns	1–2 ns	2–5 ns	>100 MHz

The f_T Parameter

Every transistor has an f_T (transition frequency, or unity-gain bandwidth) specification. This is the frequency at which current gain drops to 1. It is the single most useful number for evaluating transistor speed:

• f_T = 300 MHz → useful as a switch up to ~30 MHz
• f_T = 100 MHz → useful as a switch up to ~10 MHz
• f_T = 10 MHz → useful as a switch up to ~1 MHz
• f_T = 1 MHz → only suitable for audio and slow control circuits

A practical rule: maximum reliable switching frequency ≈ f_T / 10.

Techniques to Improve Switching Speed

1. Avoid Deep Saturation

Stored charge is proportional to how deeply the transistor is saturated. Keeping the transistor at the edge of saturation (just barely on) minimizes storage time at the cost of reduced noise margin.

Baker clamp: Add a Schottky diode from collector to base. When the collector would go below V_F_Schottky (~0.3 V), the diode forward-biases and diverts excess base current to the collector, preventing deep saturation. Storage time drops from hundreds of nanoseconds to tens of nanoseconds.

Schottky diodes (metal-semiconductor junction, no minority carrier storage) respond in picoseconds rather than nanoseconds — they do not add their own delay.

2. Active Turn-Off

Instead of simply removing base drive, actively drive the base negative when turning off:

• During off phase: apply a brief negative pulse to the base (−1 to −2 V for silicon)
• This reverse-biases the base-emitter junction, rapidly sweeping stored minority carriers out of the base
• Storage time can be reduced by 5–10× compared to passive turn-off
• Standard in TTL and similar logic families

3. Choose the Right Transistor

Select transistors with high f_T for the required frequency:

Application	Required f_T
Audio amplifier (20 kHz)	>1 MHz (any transistor)
Relay driver (1 kHz)	>100 kHz (any transistor)
1 MHz clock circuit	>10 MHz
AM radio receiver (1 MHz IF)	>10 MHz
FM radio receiver (10 MHz IF)	>100 MHz
VHF communications (30–300 MHz)	>1 GHz

4. Reduce Circuit Capacitance

External capacitances add to junction capacitances:

• Use short traces and wires — each centimeter of wire adds ~1 pF
• Keep output load small — large capacitive loads (long cables, bus lines) slow edges
• Use small collector resistors — R_C × C_load = time constant for output transition

For a 1 MHz signal through a 10 kΩ resistor with 50 pF of wiring capacitance:

• RC = 10,000 × 50×10⁻¹² = 500 ns — this alone limits rise time to ~1 µs, capping speed below 1 MHz

5. Speed-Up Capacitor

Add a small capacitor (10–100 pF) in parallel with the base resistor R_B. When the input transitions, this capacitor briefly passes a large current spike, rapidly charging C_BE and speeding up turn-on. When input returns low, the capacitor assists in pulling base negative, speeding turn-off.

This simple technique can double or triple the maximum switching frequency with no change to transistor or supply.

Measuring Switching Speed

With an Oscilloscope

1. Build the switching circuit with a precise load (1 kΩ resistor for clean waveforms)
2. Apply a fast square wave (rise time <10 ns if possible) from a signal generator
3. Observe the collector voltage waveform
4. Measure:
   • Rise time (10% to 90% of final value on the falling edge at collector)
   • Fall time (90% to 10% on the rising edge)
   • Storage delay: time from input going low to output beginning to rise

Interpreting results:

• If rise/fall times are much longer than expected: circuit capacitances dominate (reduce R_C, shorten wires)
• If storage delay is long: transistor is deeply saturated (add Baker clamp or reduce base overdrive)
• If transistor fails at high frequency but works at low frequency: f_T is insufficient, use faster transistor

Without an Oscilloscope

Set up an astable oscillator using the transistor under test. The maximum frequency at which the oscillator still produces a clean output (verified with an AM radio or frequency counter) indicates the transistor’s usable switching speed.

Maximum Clock Speeds for Early Transistor Computers

Historical context for benchmarking:

Technology	Storage Time	Max Clock	Example
Point-contact transistors (1950)	1–10 µs	~100 kHz	TRADIC (1954)
Alloy-junction Ge (1954)	500–2,000 ns	~500 kHz	IBM 608
Diffused silicon (1958)	50–200 ns	~1–5 MHz	IBM 7090
Planar silicon (1961)	5–50 ns	~10–50 MHz	early ICs
Schottky TTL (1969)	2–5 ns	~100 MHz	74S series

Summary

Switching Speed — At a Glance

• Two main speed limits: junction capacitances (charge/discharge time) and minority carrier storage in saturation
• Storage time (50–1,000 ns) is usually the dominant delay — time for stored carriers to recombine after turning off
• f_T specifies transistor bandwidth; practical switching limit ≈ f_T / 10
• Baker clamp (Schottky diode, collector to base) prevents deep saturation → storage time drops 10×
• Speed-up capacitor across base resistor (10–100 pF) helps charge C_BE faster → faster turn-on
• Active negative base drive on turn-off extracts stored carriers → speeds turn-off
• For 1 MHz applications: need f_T > 10 MHz; reduce R_C to minimize RC delay with load capacitance