Silicon Purification

Part of Semiconductors

Refining silicon from sand to semiconductor grade through chemical and physical purification steps.

Why This Matters

Silicon is the second most abundant element in Earth’s crust — present in sand (SiO2), quartz, and hundreds of common minerals. This abundance makes silicon the ideal long-term semiconductor material for a rebuilding civilization. But raw silicon is heavily contaminated with iron, aluminum, calcium, and dozens of other elements. Semiconductor-grade silicon requires contamination below 1 part per billion for critical metallic impurities — a purification factor of more than a million.

This extreme purity requirement is not an arbitrary standard. Iron atoms at 1 part per million in silicon reduce minority carrier lifetime from milliseconds to microseconds, cutting transistor gain by orders of magnitude. Aluminum at similar concentrations shifts device thresholds unpredictably. Copper precipitates at grain boundaries and creates leakage paths. The physics of minority carrier transport demands materials purity that was historically achieved only after significant industrial development.

The path from sand to semiconductor involves three stages: chemical reduction (sand to metallurgical silicon), chloride refining (metallurgical to electronic-grade polysilicon), and crystal growth plus zone refining (polysilicon to single-crystal semiconductor-grade). Each stage is achievable with progressively more sophisticated equipment.

Stage 1: Metallurgical Grade Silicon

Start with high-purity quartzite or quartz crystals (SiO2). Regular beach sand has too many impurities. Mine or source quartz from vein deposits, which are often purer than sedimentary deposits.

Carbothermic reduction: React SiO2 with carbon (coke, charcoal, or coal) at high temperature: SiO2 + 2C → Si + 2CO

Process: Arc furnace or equivalent high-temperature setup. Mix crushed quartz with carbon (coke preferred for lower ash content). Heat to 1400-1700°C. Silicon melts (melting point 1414°C) and sinks; CO gas exits. Cast molten silicon into molds.

Result: metallurgical grade silicon (MG-Si), approximately 98-99% pure. Impurities include iron (~0.3%), aluminum (~0.1%), calcium, titanium, and others. This is too contaminated for electronics but useful as the starting material.

Charcoal quality matters: Carbon in the reduction must be high purity. Charcoal from wood contains potassium, sodium, and calcium from tree biology. Petroleum coke is preferable. If using wood charcoal, choose dense hardwood charcoal and pre-bake at 1000°C to drive off volatile impurities.

Alternative starting silicon: Semiconductor-grade silicon can sometimes be recovered from broken solar panels, which use >99.9999% pure silicon. Also, damaged integrated circuit wafers contain pure silicon. These salvage routes skip the chemical processing stages and are highly valuable.

Stage 2: Trichlorosilane Route (Siemens Process)

The dominant industrial process for electronic-grade polysilicon uses trichlorosilane (SiHCl3) as an intermediate:

SiCl4 + H2 → SiHCl3 + HCl (at 500°C) Or: Si + 3HCl → SiHCl3 + H2 (at 300°C, reacting MG-Si with HCl gas)

SiHCl3 is a liquid at room temperature (boiling point 32°C) — it can be distilled to extreme purity, since most metal impurities form chlorides with very different boiling points. After distillation, pure SiHCl3 is decomposed back to silicon:

SiHCl3 + H2 → Si + 3HCl (at 1100°C on a hot silicon seed rod)

The “hot wire” CVD (chemical vapor deposition) process: electrical current heats thin silicon rods in a closed reactor vessel. Pure SiHCl3/H2 gas mixture flows around the rods. Silicon deposits on the rod surface, building up a polysilicon mass. This is the Siemens reactor.

Practical requirements: Handling HCl and SiHCl3 requires corrosion-resistant equipment (Teflon, glass, or acid-resistant steel), ventilation, and scrubbing of exhaust HCl. The CVD reactor must be leakproof — air contamination ruins the deposit. Operating at 1100°C means high-temperature heating elements and insulation.

This is achievable but requires chemical engineering capability. Plan as a medium-term goal after mastering germanium transistors.

Stage 3: Alternative — Upgraded Metallurgical Route

A simpler but less pure alternative to trichlorosilane: directly upgrade MG-Si through multiple refining steps:

Slag refining: Melt MG-Si and stir with a calcium silicate or calcium aluminate slag. Boron and phosphorus partition preferentially into the slag. Multiple treatments can reduce B and P from hundreds of ppm to tens of ppm.

Directional solidification: Similar to zone refining but applied to the whole ingot. Freeze silicon slowly from one end. Most impurities (iron, aluminum) have segregation coefficients < 1 in silicon — they prefer the liquid phase and concentrate at the last-solidified end. Cut off the impurity-rich end (last 20-30% solidified) and repeat.

Acid leaching: Crush the directionally solidified silicon. Many impurity-rich phases (iron silicide, etc.) concentrate at grain boundaries and can be selectively dissolved by HCl or H2SO4 acid wash.

After 3-4 repetitions of directional solidification plus acid leaching, silicon purity can reach 99.9999% (6-nines) for boron and phosphorus. Metallic impurities reach 99.999% (5-nines). This is adequate for simple solar cells and potentially marginal transistors.

Stage 4: Crystal Growth (Czochralski Method)

Polysilicon (electronic-grade amorphous or polycrystalline material) must become a single crystal for transistor fabrication. The Czochralski (CZ) process:

1. Melt polysilicon in a quartz crucible inside an inert atmosphere chamber (argon).
2. Touch a seed crystal (a small piece of single-crystal silicon with known orientation) to the melt surface.
3. Slowly pull the seed upward while rotating. Silicon solidifies onto the seed, continuing its crystal orientation.
4. Control pull rate and temperature to maintain a constant diameter crystal.
5. The resulting “boule” is a cylindrical single crystal.

Silicon melts at 1414°C — higher than most refractory metals can comfortably handle. The crucible must be quartz (SiO2, softening point ~1665°C). Heating by induction coil or resistance elements. The pull apparatus requires precise speed and temperature control.

For primitive fabrication: zone refining of the polysilicon rod (passing a narrow molten zone along a rod without a crucible — the float zone method) avoids the crucible contamination problem. Float zone silicon is purer than CZ silicon but requires a high-power RF induction heater and careful mechanical apparatus.

Measuring Purity

Resistivity measurement: The quickest test. Pure silicon has resistivity ~240,000 Ω·cm at room temperature. After doping or contamination, resistivity drops. If your “purified” silicon measures 1-100 Ω·cm, it is still heavily contaminated or doped with background impurities.

Four-point probe: As described in the doping articles. Place on a polished silicon bar, apply known current, measure voltage. Calculate resistivity.

Minority carrier lifetime measurement (photoconductance decay): Flash a light onto the silicon sample. Measure how quickly the induced photoconductance decays. Lifetime > 100 µs indicates electronic-grade quality. Lifetime < 1 µs indicates unacceptable metallic contamination.

Spectrographic analysis: For precise impurity identification, optical emission spectroscopy or mass spectrometry on acid-dissolved samples. These are aspirational — attainable once optical instruments are rebuilt.

Silicon purification is a multi-year infrastructure project. Begin with germanium to develop semiconductor skills while silicon infrastructure is built. Germanium can reach adequate purity with simpler equipment. Silicon’s abundance makes it the long-term foundation; germanium is the practical starting point.