Mnemonics

Part of Programming Fundamentals

Mnemonics are the short, memorable abbreviations for CPU instructions that make assembly language readable — the first layer of abstraction above raw machine code.

Why This Matters

A CPU executes instructions encoded as specific byte values. The instruction to load a value into the accumulator register might be encoded as the byte 0x3E. The instruction to add two registers might be 0x80. Without mnemonics, programming in assembly language means memorizing hundreds of numeric codes and writing programs as sequences of numbers — an error-prone and unreadable exercise.

Mnemonics — short text abbreviations like LD, ADD, JP, CALL — give each instruction a memorable name. These names are close enough to English words or standard abbreviations that an experienced programmer can read assembly language almost as fluently as a higher-level language. LD A, 42 communicates “load the value 42 into register A” instantly. 0x3E 0x2A communicates nothing.

For rebuilders establishing a computing culture, mnemonic conventions matter beyond individual programming productivity. They are the shared vocabulary that lets programmers communicate about code, document it, teach it, and debug it together. A well-designed mnemonic set makes the difference between assembly language that is a specialist knowledge and one that is broadly accessible.

Mnemonic Design Principles

Good mnemonics balance brevity (short enough to type repeatedly without fatigue) against recognizability (clear enough to understand without reference). Common design patterns:

Operation abbreviation: Take the first few letters of the operation name. ADD for addition, SUB for subtraction, MUL for multiply, DIV for divide, AND for logical AND, OR for logical OR.

Verb-noun: LD (load), ST or STA (store), JMP or JP (jump), CALL (call subroutine), RET (return). The operation first, then any qualifier.

Qualified base: A base mnemonic modified for a variant. ADD for add without carry, ADC for add with carry. JP for jump, JR for jump relative. LD for load, LDI for load and increment. The qualification letters are consistent: C for carry, R for relative, I for increment, D for decrement.

Consistent suffixes: Many instruction sets use suffixes to indicate operand size or type. MOVB for move byte, MOVW for move word. LDA for load accumulator (6502), LDX for load X register.

Z80 Mnemonic System

The Z80 uses a two-letter base for most instructions:

LD    Load (data transfer)
ADD   Add
ADC   Add with carry
SUB   Subtract
SBC   Subtract with carry
AND   Logical AND
OR    Logical OR
XOR   Logical XOR
CP    Compare (sets flags but discards result)
INC   Increment
DEC   Decrement
JP    Jump (unconditional or conditional with modifier)
JR    Jump relative (shorter encoding, limited range)
CALL  Call subroutine
RET   Return from subroutine
PUSH  Push to stack
POP   Pop from stack
NOP   No operation
HALT  Halt (stop execution)
RLA   Rotate left accumulator
RRA   Rotate right accumulator
RLCA  Rotate left accumulator (through carry)
RRCA  Rotate right accumulator (through carry)
DJNZ  Decrement B and jump if not zero
EX    Exchange (swap two register pairs)
EXX   Exchange all register pairs with alternates
LDIR  Load, increment, repeat (block copy)
CPIR  Compare, increment, repeat (block search)

Register names are single or two-letter:

• A — accumulator (primary 8-bit register)
• B, C, D, E, H, L — 8-bit general purpose
• BC, DE, HL — 16-bit register pairs (B+C, D+E, H+L)
• SP — stack pointer
• IX, IY — index registers
• PC — program counter (not directly addressable)

The Z80 mnemonic set is clean and internally consistent. Once you know the patterns, you can often guess an instruction’s mnemonic and be right.

6502 Mnemonic System

The 6502 uses a three-letter system with register-specific variants:

LDA   Load accumulator
LDX   Load X register
LDY   Load Y register
STA   Store accumulator
STX   Store X
STY   Store Y
TAX   Transfer accumulator to X
TAY   Transfer accumulator to Y
TXA   Transfer X to accumulator
TYA   Transfer Y to accumulator
TSX   Transfer stack pointer to X
TXS   Transfer X to stack pointer
ADC   Add with carry
SBC   Subtract with borrow (carry)
AND   Logical AND
ORA   Logical OR (not OR, to distinguish from opcode OR)
EOR   Exclusive OR (not XOR)
ASL   Arithmetic shift left
LSR   Logical shift right
ROL   Rotate left
ROR   Rotate right
INC   Increment memory
DEC   Decrement memory
INX   Increment X
INY   Increment Y
DEX   Decrement X
DEY   Decrement Y
CMP   Compare (accumulator)
CPX   Compare X
CPY   Compare Y
BEQ   Branch if equal (zero flag set)
BNE   Branch if not equal
BCS   Branch if carry set
BCC   Branch if carry clear
BMI   Branch if minus
BPL   Branch if plus
BVS   Branch if overflow set
BVC   Branch if overflow clear
JMP   Jump (unconditional)
JSR   Jump to subroutine
RTS   Return from subroutine
PHA   Push accumulator
PHP   Push processor status (flags)
PLA   Pull (pop) accumulator
PLP   Pull processor status
NOP   No operation
BRK   Break (software interrupt)

The 6502’s naming is less consistent than the Z80’s — ORA instead of OR, EOR instead of XOR, separate INX/INY versus INC for memory — reflecting the historical pressure to fit many instructions into a compact encoding with a small physical die. But the names are still memorable and readable once learned.

Notation for Operands

Beyond the mnemonic itself, assembly notation includes the operand specification — how to write the arguments. Conventions vary:

Immediate values: Prefixed with # on 6502 (LDA #42), no prefix on Z80 (LD A, 42), prefixed with $ for hex on 6502 (LDA #$2A), prefixed with 0x for hex on Z80 style.

Memory addresses: Just the address on Z80 (LD A, (0x2000)), just the address on 6502 (LDA $2000). The Z80 uses parentheses to indicate “value at this address” versus the address itself.

Register indirect: The Z80 uses (HL) to mean “value at address stored in HL.” The 6502 uses ($20,X) for indexed indirect addressing.

Arithmetic in operands: Most assemblers allow simple arithmetic in operand fields: LD HL, BUFFER + 10 or LD A, (BASE + OFFSET). This is evaluated by the assembler at assembly time.

Creating Your Own Mnemonic System

If you design a new instruction set from scratch (for a custom processor), choose mnemonics deliberately:

1. Make every instruction uniquely identifiable by its mnemonic. No two instructions should have the same mnemonic.

2. Use consistent patterns for related instructions. If ADD is the mnemonic for add-without-carry, use ADC for add-with-carry (C for carry), not ADDWC or something inconsistent.

3. Keep mnemonics to 2-4 characters. Shorter is more typeable; longer is more readable. 3 characters is often the sweet spot.

4. Avoid ambiguity with common English words or other instruction sets, especially if programmers will work across multiple architectures.

5. Document every mnemonic in a reference table listing the mnemonic, full operation name, encoding, flag effects, cycle count, and a brief example.

Practical Notes for Rebuilders

Print the mnemonic reference card for your CPU and keep it visible at all times while programming. Most instructions will become automatic after a few weeks of use, but the less common ones — extended instructions, flag-manipulation operations, I/O instructions — will need reference for months.

When writing assembly code, comment the purpose of instructions, not just their mechanics. LD A, (SENSOR_PORT) ; read temperature sensor is useful. LD A, (SENSOR_PORT) ; load A from sensor port merely translates the mnemonic into English — the reader already knows what LD does.

When learning a new CPU’s instruction set, group instructions by category (data movement, arithmetic, logical, control flow) and learn each group together. The patterns within groups make individual mnemonics more memorable than learning them in alphabetical order.