Fabrication Basics
Part of The Transistor
The end-to-end process flow for making your first working transistors from semiconductor material.
Why This Matters
Reading about transistors and making them are different things. Fabrication basics bridges the gap: it describes the full process flow from semiconductor ingot to tested, packaged transistors that can be dropped into circuits. The emphasis is on what actually matters at each step, what can go wrong, and how to diagnose and fix problems.
For a rebuilding civilization, the first working transistors are a civilization-level milestone. Everything that follows — radio, computers, automation — depends on having a reliable supply of functional semiconductor devices. Establishing a repeatable fabrication process, even a primitive one, is more valuable than perfecting any single device.
This article assumes you have zone-refined germanium available (or salvaged pre-collapse transistors for practice), a small tube furnace, and basic chemical handling capability. It walks through the process end-to-end with the specificity needed to actually execute it.
Prerequisites and Setup
Materials checklist before starting:
- Zone-refined n-type germanium, resistivity 0.5-5 Ω·cm
- Indium metal, 99.99% purity minimum
- HCl (hydrochloric acid), 10% solution for etching
- Distilled water (not tap — mineral content contaminates surfaces)
- Acetone or ethanol for initial degreasing
- Forming gas (5% hydrogen in nitrogen) or pure nitrogen for furnace atmosphere
- Quartz or alumina boats for furnace loading
- Fine-tipped tweezers (non-magnetic stainless steel)
- Balance accurate to 0.1 mg
- Tube furnace with temperature controller (target: 540°C, stable to ±5°C)
Cleanliness: Semiconductor fabrication is defeated by contamination. Metallic impurities from handling (iron from steel tools, copper from electrical contacts) reduce minority carrier lifetime, degrading transistor gain. Work at a clean station dedicated to semiconductor work. Wash hands before handling; use powder-free gloves for critical steps. Wipe work surface with isopropyl alcohol before each session.
Record keeping: Start a process log before picking up any materials. Date, operator, lot numbers, every process parameter, every observation. This is not bureaucracy — it is the only way to replicate successes and diagnose failures in a materials process with many variables.
Wafer Preparation
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Slice the ingot: Using a fine hacksaw or abrasive wire saw, cut 0.5-1.0 mm thick wafers from the zone-refined ingot. Work slowly; germanium is brittle and will crack if forced. Lubricate the cut with water.
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Lapping: Mount wafer on a flat glass plate with wax. Lap the top face on another glass plate with 400-grit SiC abrasive slurry. Use figure-8 motion; apply even pressure. Polish through 1000-grit, then 4000-grit. The final surface should have a matte gray appearance with fine uniform texture. Flip and lap the other face equally.
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Remove wax: Warm the wafer on the glass plate until wax softens (about 80°C). Slide wafer off. Dip in warm acetone for 2 minutes to dissolve residual wax.
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Chemical etch: Dip in 10% HCl for 30 seconds, agitating gently. This removes surface oxide and the damaged surface layer created by lapping. Rinse immediately in distilled water for 60 seconds. Check: the freshly etched germanium surface should be bright metallic, not gray or dull. If dull, etch is insufficient — repeat.
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Dry: Blow dry with clean nitrogen stream (not breath — CO2 and moisture from breath contaminate). If no nitrogen, dry in a clean warm oven at 60°C for 5 minutes with door slightly open.
The freshly prepared wafer must be used within 1-2 hours. Surface oxide begins reforming immediately; extended delay degrades junction quality.
Indium Dot Preparation and Placement
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Cut indium sheet into small pieces approximately 0.5 × 0.5 × 0.2 mm using a clean scalpel or razor blade on a glass cutting surface. Do not use steel scissors (iron contamination).
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Weigh each piece on the milligram balance. Record weight. Target 0.3-0.5 mg per dot. Sort into groups of matched weight for making matched transistors.
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Using fine-tipped tweezers, place one indium dot centered on each face of the germanium wafer. The dot should contact the surface but not press in — just resting by gravity. For a 5×5 mm wafer, aim for the dot to be within 0.5 mm of center.
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Examine placement under magnification (10×) if available. Verify both dots are aligned when the wafer is viewed from above. Misalignment means asymmetric transistor geometry (emitter and collector junction areas not coaxial) — degrade performance.
Alloying (The Critical Step)
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Load wafer-with-dots into quartz boat. The boat should hold the wafer flat without touching the indium dots. Small ridges or notches molded into the boat support the wafer edges.
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Insert boat into furnace tube. Attach reducing gas (forming gas or nitrogen flow). Allow 5 minutes to purge air from tube.
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Temperature ramp: Increase temperature at 5°C/minute. As temperature passes 156°C (indium melting point), the dots melt and may slightly spread or change shape — this is expected. Do not disturb.
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At 540°C, start timing. Hold for exactly 3 minutes on first attempt. (The timing controls junction depth — shorter for shallower, longer for deeper. 3 minutes is a reasonable starting point; adjust based on cross-section measurements.)
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Controlled cool: Reduce temperature at 2°C/minute down to 400°C, then 1°C/minute down to 200°C. This controlled cooling allows the alloy to recrystallize properly. Too-fast cooling causes polycrystalline recrystallization with poor carrier transport and low gain.
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Below 200°C, natural cooling is acceptable. Continue gas flow until below 100°C to prevent oxidation.
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Remove boat. Inspect: indium buttons should be shiny, slightly flattened, and firmly bonded to the germanium surface. A bonded dot cannot be removed by blowing with a stream of air.
Contact Attachment and Packaging
Base contact: The germanium wafer edge needs a base contact. Using fine solder or conductive silver epoxy, attach a fine wire (0.1 mm copper or gold-plated copper) to the wafer edge. If soldering: use low-temperature indium solder and a temperature-controlled iron at 180°C. Apply heat for minimum time to avoid redistribution of the alloy junctions.
Emitter and collector leads: Solder wires to each indium button. These contacts can tolerate higher solder temperature since the alloy junction already formed and the indium will not re-melt at solder temperatures (using regular tin-lead solder at 183°C — barely above indium melting but careful technique avoids liquidizing the button). Or use conductive epoxy (no heat required).
Labeling: Before packaging, record on a label: device ID number, type (PNP germanium), fabrication date and batch number. Attach this label to one lead.
Encapsulation: Pour a small amount of epoxy resin around the device body, encapsulating everything except the leads. Avoid epoxy on the bonded surfaces directly if possible (capillary action can wick epoxy under the contacts, degrading performance). Let cure 24 hours before testing.
Testing and Sorting
Test each device:
- Continuity check: Ohmmeter between each pair of leads in both polarities. Verify E-B and B-C show diode behavior; E-C shows high resistance both ways.
- hFE measurement: Set up the test jig (described in quality-sorting article). Measure at IB = 10 µA. Record.
- Leakage (ICEO): Measure with base open, 9V collector-to-emitter. Record.
- Functional circuit test: Insert into a simple amplifier circuit (single CE stage). Verify amplification of an audio tone.
Expected yields for first batches: 40-60% functional devices is realistic in the first few attempts. Common failure modes: dot lifted off (open circuit), excessive leakage (contamination), zero gain (base too thick or lifetime too short). With experience and process refinement, yields above 80% are achievable.
Failure analysis: Inspect failed devices under magnification. Lifted dots: improve surface cleanliness before alloying. Open base contact: improve bonding technique. High leakage: check water purity, check if germanium ingot section came from the impurity-rich end of the zone-refined rod. Zero gain: cross-section to check base thickness; if too thick, increase alloying time or temperature.
Process improvement is cumulative. Each batch teaches the next. After 5-10 batches, the failure modes narrow to a predictable set that are progressively eliminated with targeted process adjustments.