BJT Construction

Part of Semiconductors

Physical structure and fabrication of bipolar junction transistors from semiconductor material.

Why This Matters

The bipolar junction transistor (BJT) was the first practical amplifying transistor device, invented at Bell Labs in 1948. Unlike the earlier point-contact transistor which relied on surface effects and was notoriously fragile and variable, the BJT has a well-defined internal structure that can be systematically fabricated. Understanding BJT construction means understanding what physical arrangements of semiconductor material produce amplification — knowledge essential for anyone attempting to fabricate transistors from recovered or refined material.

For a rebuilding civilization, BJT construction represents the bridge between raw semiconductor material and functional electronic devices. The initial devices will be large, crude, and variable in performance. But the principles are sound: create two p-n junctions in series sharing a thin common region, and you have a current-amplifying device. Refinement comes with practice and better materials.

The two main BJT construction approaches — grown junction and alloy junction — were both explored in the early transistor era. Each has practical tradeoffs for primitive fabrication conditions. Knowing both allows choosing the method that matches available materials and equipment.

BJT Structure: The Three Layers

A BJT consists of three semiconductor layers in a sandwich: either NPN or PNP. The three layers are named emitter, base, and collector.

Emitter: Heavily doped, provides the majority carriers that flow through the device. In NPN, the emitter is heavily doped n-type and injects electrons into the base. In PNP, the emitter is heavily p-type and injects holes. High doping concentration in the emitter improves injection efficiency.

Base: Lightly doped, very thin. The key design constraint: the base must be thin enough that carriers injected from the emitter can diffuse across without recombining. In early germanium alloy transistors, base thickness was 25-50 micrometers. Modern silicon transistors have base thicknesses below 0.1 micrometers. Recombination in the base is the primary loss mechanism — thinner base means fewer lost carriers and higher current gain (hFE).

Collector: Moderately doped, typically larger in area than the emitter to intercept diffusing carriers. The collector junction is reverse-biased during normal operation; it sweeps carriers out of the base.

The fundamental geometry rule: emitter and collector must both contact the base, and the base must be thinner than the minority carrier diffusion length in the base material. For germanium at room temperature, diffusion length is hundreds of micrometers — relatively forgiving. For silicon, it is shorter, requiring more precise fabrication.

Grown Junction Technique

The grown junction transistor was the first type produced commercially. A single crystal of semiconductor is pulled from a melt (Czochralski method), and dopant type is changed twice during growth by adding different dopant chemicals to the melt.

Process sequence:

1. Start with n-type germanium melt (antimony doped).
2. Begin pulling crystal. Initial crystal is n-type — this becomes the collector.
3. Add excess p-type dopant (indium) to the melt, overwhelming the n-type doping. Crystal transitions to p-type — this thin region is the base. The transition must be fast to keep the base thin.
4. Add more n-type dopant to overwhelm the indium. Crystal returns to n-type — this is the emitter.
5. Slice the grown crystal to separate individual NPN sandwiches. Attach wire contacts to each region.

The challenge: the base must be thin (25-100 µm) but the transition between n and p type during pulling takes some crystal length. Fast switching of dopants and rapid pulling speed during the base region minimize its thickness. Early devices had variable base widths and correspondingly variable gain.

Grown junction transistors are mechanically robust but require a Czochralski pulling apparatus and precise dopant addition timing. They are not the best first choice for improvised fabrication.

Alloy Junction Technique

Alloy junction transistors are more accessible for improvised fabrication. They require a wafer of base material with two small dots of emitter/collector alloy material pressed against each surface.

Process for germanium PNP alloy transistor:

1. Start with thin wafer of lightly n-type germanium (~0.5 mm thick). This is the base.
2. Place small dots of indium (p-type dopant metal) on each face of the wafer, centered and aligned.
3. Heat in a reducing atmosphere (hydrogen gas or cracked ammonia to prevent oxidation) to ~550°C — above indium’s melting point (156°C) but below germanium’s (938°C).
4. Molten indium dissolves germanium locally, forming an indium-germanium alloy puddle.
5. Cool slowly. As the melt solidifies, it recrystallizes with heavy indium doping — forming p-type regions that are metallurgically bonded to the n-type base wafer.
6. The thin remaining n-type germanium between the two alloy dots is the base of the finished transistor. The two alloy regions are emitter and collector.

Critical variable: the size of indium dots and heating duration control how deeply the alloy regions penetrate the wafer. If they penetrate too far, they meet and short the device. Typical alloy depth is 100-200 µm, leaving 100-300 µm of base.

Contacts: wire bonds or mechanical pressure contacts to the two indium buttons (emitter and collector) and to the edge of the germanium wafer (base).

Wire Bonding and Packaging

The semiconductor die must be connected to external leads. For primitive fabrication:

Pressure contacts: Small phosphor bronze or beryllium copper spring wires pressed against the semiconductor surface. No bonding required. Used in early point-contact and some alloy transistors. Reliable if maintained; vibration-sensitive.

Soldering: For alloy transistors, leads can be soldered directly to the indium alloy buttons — indium melts at 156°C, well above normal solder temperatures (~183°C for tin-lead), but a low-temperature indium solder can be used. For silicon, direct soldering to the semiconductor is difficult.

Conductive epoxy: Silver-filled epoxy provides electrical contact and mechanical bonding. No heat required. Works at room temperature. Used in modern die attachment.

Packaging: The die must be protected from mechanical damage, moisture, and contamination. Options for improvised construction:

• Metal can (hermetic): machine a small brass can, seal with solder under inert gas. Best for reliability.
• Glass envelope: encase in glass with wire feedthroughs. Requires glassblowing skill but provides good hermetic seal.
• Epoxy encapsulation: coat die and wire bonds with epoxy resin. Simple but allows some moisture vapor transmission over time. Adequate for many applications.

Label the three leads clearly (E, B, C) — an unlabeled device package causes wasted testing time and possible damage from reversed connections.

Testing and Characterization

Before using a fabricated BJT in a circuit, measure its key parameters:

Continuity check: Measure resistance between all three pairs of leads (E-B, B-C, E-C) in both polarities. E-B and B-C should show diode behavior (low resistance one way, high the other). E-C should show high resistance both ways (two back-to-back diodes).

Current gain (hFE): Connect base through a 100 kΩ resistor to a 1.5V battery. Connect collector through a 1 kΩ resistor to 9V. Connect emitter to ground. Measure collector current (voltage across collector resistor / 1000). Measure base current (voltage difference across base resistor / 100000). hFE = IC / IB. For a working germanium transistor expect 20-150; silicon 50-300.

Leakage (ICBO): Measure collector-base current with emitter open and reverse bias applied (5V collector-base). In germanium, leakage of 1-10 µA at room temperature is normal. High leakage (>50 µA) indicates contamination or defect. Silicon should show sub-microampere leakage.

Breakdown voltage: Slowly increase collector-emitter voltage with no base connection until current rises sharply. This is BVCEO. Do not exceed it in circuits. Germanium alloy transistors typically break down at 15-30V; silicon at higher voltages depending on doping.

Keep records of measured parameters for each device. Matched transistors (similar hFE) are needed for differential pairs and push-pull output stages. Sort and bin devices by gain range for organized use.