Bipolar Junction Transistor

Part of The Transistor

The complete physical and operational description of the BJT as a current-controlled current amplifier.

Why This Matters

The bipolar junction transistor (BJT) is the first fully understood, analytically tractable amplifying device. Unlike earlier vacuum tube amplifiers (which required high-voltage supplies and fragile glass envelopes) or point-contact transistors (which relied on poorly-understood surface effects), the BJT has a precisely defined structure whose behavior can be derived from first principles and predicted from measurable material parameters.

For a rebuilding civilization, the BJT represents the threshold between artisanal semiconductor tinkering and systematic device engineering. A practitioner who understands the BJT at the level described here can design circuits from scratch, troubleshoot failures analytically, specify required material properties, and communicate device characteristics in the universal language of electrical engineering.

This article synthesizes the BJT’s physical structure, operational modes, key equations, and circuit implications into a unified description — the foundation for every transistor circuit that follows.

Physical Structure

The BJT consists of three alternately doped semiconductor layers:

NPN: n-type emitter | p-type base | n-type collector PNP: p-type emitter | n-type base | p-type collector

The structure creates two p-n junctions: the emitter-base junction (EBJ) and the collector-base junction (CBJ). Their relative bias states define the device’s operating mode.

Asymmetry: Emitter and collector are not interchangeable, despite the visual symmetry of the NPN/PNP diagrams. The emitter is heavily doped (high injection efficiency); the collector is moderately doped and larger in area (to intercept diffusing minority carriers). An emitter-collector swapped device works but has gain of only 1-10 instead of the normal 50-300.

Base geometry constraint: The base must be thinner than the minority carrier diffusion length in the base material. Injected minority carriers (electrons in NPN) must diffuse across the base and reach the collector junction before recombining. If the base is too thick, carriers recombine in transit, reducing current gain. Practical base widths: 25-200 µm for alloy junction transistors, 0.1-2 µm for modern silicon devices.

Operating Modes

Mode	EBJ Bias	CBJ Bias	Application
Active	Forward	Reverse	Amplification
Saturation	Forward	Forward	Switch ON
Cutoff	Reverse	Reverse	Switch OFF
Inverse active	Reverse	Forward	Rarely used

Active mode is the normal amplification mode. Forward-biased EBJ injects minority carriers into the base. Reverse-biased CBJ sweeps them into the collector. IC = hFE × IB, with hFE typically 50-500.

Saturation mode: Both junctions forward biased. VCEsat ≈ 0.1-0.3V (silicon). Transistor acts like a closed switch with small series resistance. Used in digital logic and relay drivers.

Cutoff mode: No base current. IB = 0. Only leakage ICEO flows. Transistor acts like an open switch. Used in digital logic for the OFF state.

Ebers-Moll Model

The Ebers-Moll model is the comprehensive physics-based description of BJT behavior across all operating modes. It consists of two coupled diode currents:

IC = IS × (e^(VBE/VT) - 1) - (IS/αR) × (e^(VBC/VT) - 1) IE = -(IS/αF) × (e^(VBE/VT) - 1) + IS × (e^(VBC/VT) - 1)

where:

• IS = saturation current (scales with device area and material)
• αF = forward current gain ratio (IC/IE in active mode, αF ≈ 0.99 for good transistors)
• αR = reverse current gain ratio (much smaller than αF, typically 0.5-0.9)
• VT = kT/q ≈ 0.026V at room temperature

From αF: hFE = αF / (1 - αF). If αF = 0.99: hFE = 99. If αF = 0.995: hFE = 199.

The Ebers-Moll model accurately describes transistor behavior in all four operating regions. For circuit simulation (if computing capability exists), this model allows accurate prediction of switching transients, saturation behavior, and temperature effects.

Key Device Parameters and Their Physical Origins

hFE (DC current gain): Primarily determined by base transport factor (fraction of injected carriers reaching collector) and emitter injection efficiency (fraction of emitter current due to desired carrier type). Base transport factor: αT = cosh^-1(WB / L_minority), where WB is base width and L_minority is minority carrier diffusion length. For WB << L_minority: αT ≈ 1 - WB²/(2L²).

To maximize hFE: minimize base width, maximize minority carrier lifetime in base (reduce impurities and crystal defects), and heavily dope the emitter.

BVCEO (collector-emitter breakdown voltage): Determined by avalanche breakdown of the reverse-biased CBJ, modified by the transistor’s current multiplication. BVCEO ≈ BVCBO / (hFE)^(1/n), where BVCBO is the collector-base breakdown and n ≈ 3-4. A transistor with hFE = 100 and BVCBO = 150V has BVCEO ≈ 150/100^(1/4) ≈ 47V. Higher gain transistors have lower BVCEO — a fundamental tradeoff.

fT (transition frequency): Frequency where current gain drops to unity. fT = gm / (2π(Cπ + Cµ)), where gm is transconductance, Cπ is base-emitter capacitance, and Cµ is base-collector capacitance. For alloy junction transistors: fT typically 1-50 MHz. Limited by base transit time and junction capacitances.

VCEsat (saturation voltage): Voltage across transistor in saturation. Limits efficiency in switching circuits. Typical silicon: 0.1-0.3V at rated current. Germanium alloy: 0.05-0.15V (lower, one advantage of germanium).

Small-Signal Model and Gain Derivation

For small-signal (AC) analysis around the Q-point, the BJT is replaced by:

• rπ = hFE / gm = VT/IB (input resistance from base to emitter)
• gm = IC/VT (transconductance)
• ro = VA/IC (output resistance, VA = Early voltage ~50-200V)

Common emitter voltage gain: Av = -gm × (RC || ro) ≈ -gm × RC (for RC << ro) = -(IC/VT) × RC = -ΔIC × RC / VT

For IC = 1 mA, RC = 4.7 kΩ: Av = -(0.001/0.026) × 4700 = -181

Input impedance: Zin = R1 || R2 || rπ (with voltage divider bias). For R1 = 68 kΩ, R2 = 18 kΩ, rπ = 2.6 kΩ: Zin ≈ 2.3 kΩ. This limits source impedance — sources with impedance near or above Zin are heavily loaded, reducing gain.

Output impedance: Zout = RC || ro ≈ RC. For RC = 4.7 kΩ: Zout ≈ 4.7 kΩ. This loads the next stage.

Gain-Bandwidth Tradeoff

A fundamental property: increasing gain in an amplifier stage reduces bandwidth. For a single-pole system, gain × bandwidth = constant (the gain-bandwidth product ≈ fT of the transistor).

A transistor with fT = 100 MHz in common-emitter configuration with voltage gain of 100 has bandwidth of approximately 1 MHz. The same transistor with gain of 10 has 10 MHz bandwidth. This tradeoff governs amplifier design: use multiple stages of moderate gain rather than one stage of very high gain to achieve both high total gain and adequate bandwidth.

For a rebuilding civilization, this tradeoff sets the hierarchy: audio circuits (20-20,000 Hz) work with low-fT devices. AM radio (530-1600 kHz) requires fT > 20 MHz minimum. FM radio (87-108 MHz) needs high-fT transistors. Television (50-800 MHz) is not achievable with alloy junction transistors. Plan device fabrication with these frequency targets in mind.